M Aug 25, 2008:
| Course Overview, Introduction to Digital Logic
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W Aug 27, 2008:
| Basic Logic Gates, Boolean Algebra
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F Aug 29, 2008:
| Boolean Algebra, Combinational Logic Design Process
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M Sep 01, 2008:
| No Class - Labor Day
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W Sep 03, 2008:
| Combinational Logic Design Process
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F Sep 05, 2008:
| Combinational Logic, Common Combinational Components
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M Sep 08, 2008:
| Verilog: Combinational Logic Design
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W Sep 10, 2008:
| Verilog: Combinational Logic Design, Review for Exam
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F Sep 12, 2008:
| Basic Storage Element
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M Sep 15, 2008:
| Exam 1, Basic Storage Element
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W Sep 17, 2008:
| Basic Register Design, Controllers
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F Sep 19, 2008:
| No Class
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M Sep 22, 2008:
| Sequential Logic Design Process
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W Sep 24, 2008:
| Sequential Logic Design Process
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F Sep 26, 2008:
| Sequential Logic Design Process, Verilog: Sequential Logic Design
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M Sep 29, 2008:
| Verilog: Sequential Logic Design, Review for Exam
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W Oct 01, 2008:
| No Class, Optional Review for Exam
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F Oct 03, 2008:
| Exam 2, Multifunction Registers
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M Oct 06, 2008:
| Multifunction Registers, Adders: Half-Adder, Full-Adder, Carry-Ripple Adder, Incrementers
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W Oct 08, 2008:
| Adders: Half-Adder, Full-Adder, Carry-Ripple Adder, Incrementers
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F Oct 10, 2008:
| Shifters, Comparators, Counters, Multipliers
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M Oct 13, 2008:
| No Class
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W Oct 15, 2008:
| Shifters, Comparators, Counters, Multipliers
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F Oct 17, 2008:
| Verilog: Datapath Components
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M Oct 20, 2008:
| No Class
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W Oct 22, 2008:
| No Class
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F Oct 24, 2008:
| No Class
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M Oct 27, 2008:
| Subtractors, Two's Complement, Overflow
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W Oct 29, 2008:
| Subtractors, Two's Complement, Overflow, Review for Exam
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F Oct 31, 2008:
| Exam 3, ALUs, Register Files , Introduction to RTL Design
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M Nov 03, 2008:
| Introduction to RTL Design , RTL Design Method and Examples
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W Nov 05, 2008:
| RTL Design Method and Examples
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F Nov 07, 2008:
| RTL Design Method and Examples
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M Nov 10, 2008:
| Verilog: RTL Design
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W Nov 12, 2008:
| Determining Clock Frequency, Behavioral RTL Design: C to Gates
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F Nov 14, 2008:
| Memories: RAM, ROM, PROM
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M Nov 17, 2008:
| Memories: RAM, ROM, PROM
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W Nov 19, 2008:
| Review for Exam
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F Nov 21, 2008:
| Exam 4,Combinational Optimization: Two-Level Minimization, Karnaugh Maps
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M Nov 24, 2008:
| Combinational Optimization: Exact and Heuristic Minimization, Multi-level Optimization
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W Nov 26, 2008:
| No Class
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F Nov 28, 2008:
| No Class - Thanksgiving
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M Dec 01, 2008:
| State Encodings, Mealy FSMs
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W Dec 03, 2008:
| Carry-Lookahead Adders
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F Dec 05, 2008:
| Carry-Lookahead Adders
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M Dec 08, 2008:
| Implementation: Manufactured ICs, FPGAs
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W Dec 10, 2008:
| Implementation: Manufactured ICs, FPGAs
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W Dec 17, 2008:
| Exam 5, 11am-1pm
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