Homework Assignments
All homework assignments will be graded out of 100 points. Optional homework assignments will not be graded and will not be counted towards your course grade. Solutions to homework assignments(graded and optional) will be posted online as soon as possible within a password protected area.
Note: Homework assignments are indicative of the types of problems you can expect to encounter on the exams.
Required Assignments
Homework 1 – Due W Sep 03, 2008 (beginning of lecture by 12:05)
Digital Design: 1.7, 1.12, 1.18, 1.22, 1.24, Extra Credit (5 points) 1.26
Homework 2 – Due W Sep 10, 2008 (beginning of lecture by 12:05)
Digital Design: 2.29, 2.44, 2.57, 2.72, 2.75
Extra Credit (10 points): Design a simple comparator circuit with two 2-bit inputs A and B and a single output LT that indicates if the decimal value of A is less than the decimal value of B. For example, if A is 10 (2 in decimal) and B is 01 (1 in decimal), A is not less than B, and thus LT will be 0. Using the combinational logic design process, implement the simple comparator circuit using AND, OR, and NOT gates. Note: Be sure to label the individual bits of A and B separately.
Homework 3 – Due F Sep 26 (beginning of lecture by 12:05)
Digital Design: 3.8, 3.15, 3.25, 3.38, 3.44
Extra Credit (10 points): Create an FSM for a sequence generator that has two inputs, gen and term, and a single output seq. The sequence generator operates as follows. Initially, the seq output should be 1. When the gen input becomes 1, the sequence generator will output the sequence 1, 0, 1, 1, 1 on the output seq repeatedly until the term input becomes 1. When the input term becomes 1, the sequence generator should immediately terminate outputting the sequence and return to the initial state (even in the sequence generator is in the middle of the sequence).
Homework 4 – Due M Oct 27 (beginning of lecture by 12:05)
Digital Design: 4.5
(but using separate control inputs for each operation), 4.34, 4.42, 4.47, 4.53
Extra Credit (10 points): Design a median circuit that has three 8-bit inputs A, B, and C and one 8-bit output MED that outputs the median (or middle) value of the three inputs. The following provides a black box view of the median circuit. In your design, you may use any datapath components discussed in lectures, homework assignments, and tests. Note: Spend some time thinking about this problem first before designing your circuit. It may be easier than you initially think.
Homework 5 – Due W Dec 10 (beginning of lecture by 12:05)
Digital Design: 6.3, 6.14, 6.24, 6.27, 7.25, Extra Credit (10 points) 7.27
Optional Assignments
Optional Homework 1 – Solutions to be posted W Sep 10, 2008
Digital Design: 2.11, 2.22, 2.26, 2.47, 2.53
Optional Homework 2 – Solutions to be posted M Sep 29, 2008
Digital Design: 3.11, 3.13, 3.32, 3.42, 3.45
Optional Homework 3 – Solutions to be posted M Oct 27, 2008
Digital Design: 4.3, 4.7, 4.12, 4.16, 4.21
Optional Homework 4 – Solutions to be posted M Nov 17, 2008
Digital Design: 5.4, 5.11, 5.16, 5.23, 5.31