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ECE 576 - Lectures

R Jan 12: Course Overview, Introduction, and Review PDF

T Jan 17: Finite State Machine (FSM) Specification PDF

R Jan 19: SystemC/TLM Introduction and Overview PDF

*Paper: Gajski, D., F. Cai. Transaction Level Modeling (TLM): An Overview, International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2003. PDF

T Jan 24 SystemC and Transaction Level Modeling (TLM) PDF

R Jan 26 SystemC and Transaction Level Modeling (TLM) PDF

*'Source Code: laserdist.cpp

T Jan 31 SystemC and Transaction Level Modeling (TLM) PDF

*Link: SystemC Type Declaration Tutorial: http://www.doulos.com/knowhow/systemc/faq/

R Feb 02 Quiz, Transaction Level Modeling (TLM), Bus Functional Modeling PDF

*Paper: Atitallah, R., S. Niar, S. Meftali, J. Dekeyser. An MPSoC Performance Estimation Framework Using Transaction Level Modeling. International Conference on Embedded and Real-Time Computing Systems and Applications, 2007. PDF
*Datasheet: Xilinx PLB Master Burst Interface PDF

T Feb 07 Transaction Level Modeling (TLM), Bus Functional Modeling PDF

*Datasheet: Xilinx PLB Master Burst Interface PDF

R Feb 09 Transaction Level Modeling (TLM), Bus Functional Modeling PDF (cont.),

T Feb 14 SystemC Simulation Semantics PDF, Hardware/Software Codesign Introduction PDF

*Paper: W. Wolfe. A Decade of Hardware/Software Codesign. IEEE Computer, 2003. PDF

R Feb 16 Quiz, Hardware/Software Partitioning: Communication Delays, MPEG Encoder Example PDF

Source Code (Simple): mpeg2encode_sad_simple.c
Source Code (Efficient): mpeg2encode_sad_efficient.c
Profile: mpeg2encode_profile.xls
HW Accelerator (Verilog): mpeg2encode_sad.v


*Paper: J. Aldis. Using SystemC to Build a System=on-Chip Platform. Embedded System Design, Jan/Feb 2011, pp. 14-27. Link

T Feb 21 Hardware/Software Partitioning: Communication Delays, MPEG Encoder Example PDF

Source Code (Simple): mpeg2encode_sad_simple.c
Source Code (Efficient): mpeg2encode_sad_efficient.c
Profile: mpeg2encode_profile.xls
HW Accelerator (Verilog): mpeg2encode_sad.v


R Feb 23 Hardware/Software Partitioning: Communication Delays, MPEG Encoder Example PDF

Source Code (Simple): mpeg2encode_sad_simple.c
Source Code (Efficient): mpeg2encode_sad_efficient.c
Profile: mpeg2encode_profile.xls
HW Accelerator (Verilog): mpeg2encode_sad.v


T Feb 28 Hardware/Software Partitioning: Multiple Clock Domains and Cache Consistency/Coherency

R Mar 01 Exam 1

*Practice Problems: exam1_practice.pdf

T Mar 06 Hardware/Software Partitioning: Power/Energy Estimation PDF

*Excel Sheet for Power Estimation: XLS

R Mar 08 Hardware/Software Partitioning: PDF

*Paper: Tiwari, V., Malik, S., Wolfe, A. Power Analysis of Embedded Software: A First Step Towards Software Power Minimization. International Conference on Computer Aided Design, 1994. PDF
*Paper: Varmayz, A., E. Debesz, I. Kozintsevz, B, Jacoby. Instruction-Level Power Dissipation in the Intel XScale Embedded Microprocessor. Annual Symposium on Electronic Imaging Science & Technology (SPIE), 2005. PDF

T Mar 13 No Class

R Mar 15 No Class

T Mar 20 Power State Machines

*XScale PSM': JPG

R Mar 22 Power State Machines

*Paper: Benini, L., R. Hodgson, P. Siegel. System-level power estimation and optimization. International Symposium on Low Power Electronics and Design (ISLPED), 1998. PDF

T Mar 27 High-Level Synthesis (Xilinx AutoESL Demo), Application Profiling (LOOAN Demo)

R Mar 29 No Class

T Apr 03 Real-time Scheduling PDF

R Apr 05 Real-time Scheduling PDF

T Apr 10 Real-time Scheduling: Response Time Analysis PDF, Real-time Scheduling and Hardware Software Partitioning PDF

*Article: Carbone, J. Back to the Basics: How to Measure Real-Time Performance. Link

R Apr 12 Synchronous Dataflow, Static Scheduling PDF (note: these notes are rudimentary and need updating)

T Apr 17 Paper Presentation

*Paper 0 (Presented by Roman): K. Shankar, R. Lysecky. Non-Intrusive Dynamic Application Profiling for Multitasked Applications. Design Automation Conference (DAC), pp. 130-135, 2009. PDF


R Apr 19 To Be Determined

T Apr 24 Exam 2

R Apr 26 Paper Presentations

*Paper 1(Presented by Christopher): Paulin, P. Programming challenges & solutions for multi-processor SoCs: An industrial perspective. Design Automation Conference (DAC), 2012. PDF
*Paper 2 (Presented by Gregory): S. L. Sheey, S. Parameswarany, N. Cheungz. Novel Architecture for Loop Acceleration : A Case Study, (CODES+ISSS), 2005. PDF
*Paper 3 (Presented by Lucas): Z. Guo, A. B. Buyukkurt and W. Najjar. Input Data Reuse In Compiling Window Operations Onto Reconfigurable Hardware. Symp. On Languages, Compilers and Tools for Embedded Systems (LCTES), 2004. PDF
*Paper 4 (Presented by Nathan): Baker, M. A., Parameswaran, V., Chatha, K. S., and Li, B. 2008. Power Reduction via Macroblock Prioritization for Power Aware H.264 Video Applications. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2008. PDF

T May 01 Paper Presentations

*Paper 5 (Presented by Cihan): Agron, J., D. Andrews, Building Heterogeneous Reconfigurable Systems With a Hardware Microkernel. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2009. PDF
*Paper 6 (Presented by He): Huang, K. J.-J. Chen. Dynamic counters and the efficient and effective online power management of embedded real-time systems. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2012. PDF
*Paper 7 (Presented by Akash): Kim, S. H., S. Mukohopadhyay, M. Wolf. System-Level Energy Optimization for Error-Tolerant Image Compression. IEEE Embedded Systems Letters (ESL), Vol. 2, No. 3, pp. 81-84, 2010. PDF

UPCOMING LECTURES

The following lectures provides an overview of lectures from previous semesters, which may differ from the current semester. The following is provided for reference only.

Papers for Presentations