ECE 576

Due Friday, February 5, 11:59PM

Announcements and Clarifications:

Jan 29: Your FIR component should only read each entry within the designated memory locations (512-767) once. During each iteration, the current value read from memory corresponds to the x_t entry, where x_t-1 and x_t-2 are the previous entries read.

1. (20 points) System-level Design of an FIR filter using SystemC.

Using SystemC and transaction-level modeling, design a system-level model of a finite impulse response filter (FIR) filter. As presented in the following diagram, the FIR filter consists of a FIR master, a communication bus, a memory peripheral, and a display peripheral. The FIR filter will compute the FIR for 256 unsigned integers stored within locations 512-767 of a 1024x32 memory using the following equation:

Each computed FIR value will be written to the display peripheral that will output the resulting value along with a timestamp. The following details provide further information regarding the organization and implementation requirements.

• Your implementation should consist of two interfaces, a bus master interface (bus_master_if) and a bus servant interface (bus_servant_if). At a minimum, these interfaces must provide the following functionality. However, you are free to add additional capabilities.

• The master will connect to the communication bus through the bus master interface, and the communication bus will connect to the memory and display peripherals through the bus servant interface. Note that the communication bus must be able to determine to which peripheral the specified read/write address corresponds. However, the communication bus should not have hardcoded addresses for the connected components, but rather should use the interface provided by each component to determine the target for each transaction.
• The memory component is a memory is a 1024x32 word addressable memory mapped to the address range 0 – 1023. The memory should be initialized by reading in the initial values from an input file, where the file contains one integer value per line. The initialization should be incorporated into the memory component (e.g. within the memory component’s constructor) and not from the fir component. The following provides is an example memory input file: mem.txt.
• The display peripheral has a single memory mapped location mapped to the address 1024. Any value written to the display component should be printed out along with the current time. Any reads from the display component will return a value of 0.

2. (10 points) Performance Modeling of FIR Filter.

Extend your system-level implementation to incorporate approximate time accurate performance data using the following information, assuming a system clock operating at 50 MHz.

• Each FIR computation requires 1 clock cycle.
• Each bus access requires at least 3 clock cycles.
• Memory accesses from consecutive locations require 40 ns.
• Memory accesses from non-consecutive locations require 80 ns (the first memory access is assumed to be a non-consecutive access).

Submission Requirements:

You must submit your SystemC files via D2L as a single ZIP or TAR/GZIPPED archive. Note: Do not submit executables, Makefiles, or Visual Studio project files.

Linux Server Requirements:

The server embedded.ece.arizona.edu will be utilized to test all homework assignments. The embedded server is available for development and testing of your design. If you want to use the embedded server, please email the instructor with your ECE account login to allow for a directory to setup for your development efforts.

Students can utilize the departmental servers and workstations for their projects, and are free to use Microsoft Visual Studio, if desired. If you choose to use Microsoft Visual Studio, you will need to compile the SystemC library, for which many tutorials exist. While you are free to use any development environment, you should test your code for correct functionality on the embedded server before submitting.