R Jan 14, 2010: Course Overview, Introduction, and Review PDF
T Jan 19, 2010: SystemC Overview
R Jan 21, 2010: SystemC and Transaction Level Modeling (TLM) PDF
T Jan 26, 2010: SystemC/TLM - Bus Functional Modeling
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Paper: Gajski, D., F. Cai. Transaction Level Modeling (TLM): An Overview, International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2003.
PDF
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Paper: Donlin, A. Transaction Level Modeling: Flows and Use Models. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2004.
PDF
R Jan 28, 2010: SystemC/TLM - Bus Arbitration Modeling
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Paper: Atitallah, R., S. Niar, S. Meftali, J. Dekeyser. An MPSoC Performance Estimation Framework Using Transaction Level Modeling. International Conference on Embedded and Real-Time Computing Systems and Applications, 2007.
PDF
T Feb 02, 2010: StateCharts PDF
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Paper: Harel, D. Statecharts: A Visual formalism for Complex Systems, Sci. Comput. Programming 8, pp. 231-274, 1987.
PDF
R Feb 04, 2010: StateCharts PDF, Quiz 1
T Feb 09, 2010: TLM, Bus Functional Modeling, Hardware/Software Codesign
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Datasheet: Xilinx PLB Master Burst Interface
PDF
R Feb 11, 2010: Hardware/Software Codesign
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Paper: W. Wolfe. A Decade of Hardware/Software Codesign. IEEE Computer, 2003.
PDF
T Feb 16, 2010: Hardware/Software Codesign: Performance Estimation PDF
R Feb 18, 2010: Hardware/Software Partitioning: Ideal Optimizations
T Feb 23, 2010: Hardware/Software Partitioning: Communication Delays, JPEG/MPEG Example
JPEG Overview PPT
R Feb 25, 2010: Hardware/Software Partitioning: MPEG Example, Bus Timing PDF
T Mar 2, 2010: Hardware/Software Partitioning: MPEG Example, Bus Timing PDF
R Mar 4, 2010: Hardware/Software Partitioning
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Paper: D. Galloway. The Transmogrifier C Hardware Descriptiopn Language and Compiler for FPGAs. IEEE Computer, April 2003.
PDF
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Paper: S. Edwards. The Challenges of Hardware Synthesis from C-like Languages. Design Automation and Test in Europe (DATE), 2005.
PDF
T Mar 9, 2010: Review for Exam
R Mar 11, 2010: Exam 1
T Mar 15, 2010: No Class (Spring Break)
R Mar 18, 2010: No Class (Spring Break)
T Mar 23, 2010: Hardware/Software Partitioning: Energy Estimation PDF PDF (Errata)
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Paper: Tiwari, V., Malik, S., Wolfe, A. Power Analysis of Embedded Software: A First Step Towards Software Power Minimization. International Conference on Computer Aided Design, 1994.
PDF PDF (Errata)
R Mar 25, 2010: Hardware/Software Partitioning: Energy Estimation PDF PDF (Errata)
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Paper: Varmayz, A., E. Debesz, I. Kozintsevz, B, Jacoby. Instruction-Level Power Dissipation in the Intel XScale Embedded Microprocessor. Annual Symposium on Electronic Imaging Science & Technology (SPIE), 2005.
PDF
T Mar 30, 2010: No Class, Work on your HW Assignment 3
R Apr 01, 2010: Extended Office Hours
T Apr 06, 2010: Hardware/Software Partitioning: Power Optimization (Voltage Scalable Processors)
R Apr 08, 2010: Real-time Scheduling PDF
T Apr 13, 2010: Real-time Scheduling PDF
R Apr 15, 2010: Synchronous Dataflow, Static Scheduling PDF (note: these notes are rudimentary and need updating)
T Apr 20, 2010: Review
R Apr 22, 2010: Exam 2
T Apr 27, 2010: Paper Presentations
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Paper 1: Lars Bauer, Muhammad Shafique, and Joerg Henkel. Run-time Instruction Set Selection in a Transmutable Embedded Processor DAC 2008, 2008, Anaheim, California, USA.
PDF Presenters: Paul (& Roman),
Inquisitors: Everyone
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Paper 2: M. Abdelhalim, S. Habib. Fast Hardware Upper-Bound Power Estimation for a Novel FPGA-Based HW/SW Partitioning Scheme. IEEE Computer Society Annual Symposium on VLSI (ISVLIS), 2008.
PDF Presenters: Chen & Rajdeep,
Inquisitors: Xingjun & Andrew (Lotti)
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Paper 3: S. L. Sheey, S. Parameswarany, N. Cheungz. Novel Architecture for Loop Acceleration : A Case Study, (CODES+ISSS), 2005.
PDF Presenters: Sundar (Srinivasan) & Senthil,
Inquisitors: Sundararaman & Venkata
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Paper 5: Z. Guo, A. B. Buyukkurt and W. Najjar. Input Data Reuse In Compiling Window Operations Onto Reconfigurable Hardware. Symp. On Languages, Compilers and Tools for Embedded Systems (LCTES), 2004.
PDF Presenters: Andrew (Lotti) & Yoon (tentative),
Inquisitors: Senthil & Janhavi
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Paper 6: J. Ceng, J. Castrillon, W. Sheng, H. Scharwachter, R. Leupers, G. Ascheid, H. Meyr, T. Isshiki, H. Kunieda. MAPS: An Integrated Framework for MPSoC Application Parallelization. Design Automation Conference (DAC), 2008.
PDF Presenters: Venkata & Sundararaman,
Inquisitors: Andrew (Tomlinson) & Richard
R Apr 29, 2010: Paper Presentations, Quiz 2
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Paper 4: James Balfour, William J. Dally, Fellow, David Black-Schaffer, Vishal Parikh, JongSoo Park. An Energy-Efficient Processor Architecture for Embedded Systems. IEEE Computer Architecture Letters, Vol. 7, No. 1, 2008.
PDF Presenters: Vivek & Janhavi,
Inquisitors: Chen & Yequn
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Paper 7: Stitt, G., F. Vahid, New Decompilation Techniques for Binary-level Co-processor Generation. International Conference on Computer-Aided Design (ICCAD), 2005.
PDF Presenters: Isidro & Jennifer,
Inquisitors: Erica, Jeff, and Paul
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Paper 8: Baker, M. A., Parameswaran, V., Chatha, K. S., and Li, B. 2008. Power reduction via macroblock prioritization for power aware H.264 video applications. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2008.
PDF Presenters: Erica and Richard,
Inquisitors: Rajdeep & Jennifer
T May 4, 2010: Paper Presentations (if needed)
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Paper 9: E. Anderson, W. Peck, J. Stevens, J. Agron, F. Baijot, S. Warn, and D. Andrews, Supporting High-Level Language Semantics Within Hardware Resident Threads, 17th International Conference on Field Programmable Logic and Applications, August 2007. pp. 98-103.
PDF Presenters: Andrew (Tomlinson) & Jeff,
Inquisitors: Yoon & Isidro
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Paper 10: K. Shankar, R. Lysecky. Non-Intrusive Dynamic Application Profiling for Multitasked Applications. Design Automation Conference (DAC), pp. 130-135, 2009.
PDF Presenters: Xingjun & Yequn,
Inquisitors: Sundar (Srinivasan) & Vivek