University of Arizona
Department of Electrical and Computer Engineering
ECE 462/562: Computer Architecture and Design



This page contains downloads for ECE 462/562 and other resources that you may find useful, especially with respect to RISCV. The page is maintained by Tosi.

RISCV Overview

RISC-V is an open-source and highly modular instruction set architecture (ISA) that is designed for flexibility and scalability in modern processor design. Unlike proprietary ISAs, RISC-V allows for free use and customization, making it popular in academic research, industry, and open-source hardware projects. It supports a range of implementations, from small embedded systems to high-performance processors, and its simplicity enables efficient hardware design, software development, and innovation in various computing platforms.

RISCV through Chipyard

Chipyard is an open-source framework developed by UC Berkeley for designing, simulating, and testing custom System-on-Chip (SoC) hardware. It integrates RISC-V processors, accelerators, and peripherals in a modular environment, using the Chisel hardware description language. Chipyard supports both FPGA prototyping and full ASIC design flows, making it an ideal platform for academic research, custom hardware prototyping, and design space exploration in computer architecture.

Setting up Chipyard

The Chipyard documentation provides details on how to setup the needed simulation environments and toolchains to get started.

I've created a shell script that automates the installation process, configures essential dependencies, and sets up the environment, making it easier for students to quickly begin working with Chipyard. I created the script to work on Ubuntu, so you might need to make changes to get it to work on your machine. You may also need to install more dependencies to get it to work. If you have a Windows machine (with a recent OS), Windows Subsystem for Linux (WSL 2) is a great way to run Ubuntu on your Windows machine. You may also use Docker Desktop to run the Ubuntu Docker image below (this option also requires WSL 2).

The setup script uses a conda environment to make dependency management easier.

Here's an Ubuntu Docker image (192MB) on which I've tested the script. After downloading and unzipping the image, you may run it on a Windows machine or Linux. Simply copy the text of setup_chipyard.sh into a new file using a text editor and run it in the home directory to set up Chipyard. The Docker image is unnecessary if you have a Linux machine.

Alternatively, here's another Ubuntu Docker image (1.5GB) on which I've set up Chipyard. You wouldn't need to run the script for this image, but it's much larger and would take a lot more time to download.

After setting up Chipyard using the script, go into the Chipyard directory and source the env.sh file to setup the environment variables (source ./env.sh). To test the setup, first activate the environment (source /root/miniforge3/bin/activate), enter into the Verilator directory (Verilator is an open source HDL simulator similar to Vivado) as described here and simulate the default example.

To compile a processor (e.g., the Rocket chip), run make CONFIG=RocketConfig. This should generate the processor executable (e.g., simulator-chipyard.harness-RocketConfig), which you can then run to simulate the processor. This processor can then be modified to implement new features or optimizations, after which it needs to be recompiled.

Old RISCV Resources

I've not tested anything from this point down in years, so YMMV.

I'll be posting rough notes, links, and instructions for getting RISCV setup based on my experience (mostly on Ubuntu). Of course, you would need to dig deeper to achieve your specific objectives for your projects.

Embedded RISCV Core

Here's a RISCV core written in Verilog. To clone the directory:

git clone https://github.com/ultraembedded/riscv.git

You would need to install SystemC. Here's a blog containing instructions for SystemC installation on Ubuntu. A few things to note while installing:

  • You would need to install dependencies: sudo apt-get install libelf-dev binutils-dev
  • If not already installed, you would need to install Verilator. I installed from Git (and not Package Manager).
  • When building the testbench, make sure to specify the correct SystemC and Verilator directories in the appropriate makefile
  • Set the LD_LIBRARY_PATH environment variable to the SystemC library directory:
    export LD_LIBRARY_PATH=/path-to-systemc/lib-linux64. You may also need to set the SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variables to the include directory and lib-linux64 directories, respectively.

PULP RISCV

These instructions assume the RISCY implementation, but the process should be similar for other implementations. The RISCY user manual can be found here.

Install the toolchain dependencies:

sudo apt-get install autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev cmake

Install the RI5CY (don't ask me why it's spelled with a '5'!) GNU toolchain: RI5CY GNU toolchain:

git clone https://github.com/pulp-platform/ri5cy_gnu_toolchain.git

Build by running make. You will likely encounter some errors. To solve the issues, in build/src/newlib-gcc/gcc/cp, replace the Make-lang.in, cfns.gperf, cfns.h, and except.c files with the files in this zip file. Alternatively, you may patch the files yourself as instructed here.

Rerun make.

Next, follow the instructions here to set up PULPino. First clone the directory:

git clone https://github.com/pulp-platform/pulpino.git

Install ModelSim. I recommend installing the latest Lite version. You would need to create a free IntelFPGA account. Click on Individual Files tab and download ModelSim. Here's a blog that provides installation instructions. Select the free starter Intel FPGA edition during installation. ModelSim will likely be installed in your home directory.

If you're using a 64-bit computer, you would need to get the 32-bit binaries using instructions here. When installing dependencies, if you get an error with libpng12-0:i386, simply remove it from the list of packages and install everything else. Thereafter, download the Debian package for libpng12-0:i386 and install:

sudo apt install ./libpng12-0_1.2.54-1ubuntu1.1_i386.deb

You may also need to download a specific version of libfreetype (a font setting library) as described in the blog. Follow the rest of the instructions for downloading, installing, and modifying ModelSim to use it. After following all the instructions and attempting to run vsim, if you get an error related to not finding linux_rh60, modify bin/vsim and change "linux_rh60" (in approximately line 211) to "linux". Also, in line 13, add "32" between the quotes, i.e.,

mode=${MTI_VCO_MODE:-"32"}

Thereafter, running vsim (bin/vsim) should open the ModelSim GUI.

Follow the rest of the instructions on the PULPino page. You don't need to generate the documentation. Remember to add the install/bin directory of the ri5cy_gnu_toolchain to your $PATH environment variable:

export PATH=$PATH:/path_to_ri5cy_gnu_toolchain/install/bin

make vcompile errors (these are errors I encountered and what I did to solve them).

  • tcsh not found: sudo apt install tcsh
  • Failed to open executable... vlog. Create a symbolic link from the directory in the error to the bin directory of the ModelSim installation:

    sudo ln -s ~/modelsim/19.1/modelsim_ase/bin ~/modelsim/19.1/modelsim_ase/bin/../linux/../linux_x86_64pe

Of course, make sure the directory names match yours.

make helloworld.vsim errors

  • Failed to open executable vish: copy the vish binary from modelsim/modelsim_ase/linuxaloem into modelsim/modelsim_ase/bin
  • Error: Trofs initialization...: copy the "trofs0.4.6" directory modelsim/modelsim_ase/linuxaloem into modelsim/modelsim_ase/bin
  • Unable to obtain a license: Remove -64 from pulpino/sw/build/apps/helloworld/CMakeFiles/helloworld.vsim.dir/build.make (line 60). To prevent this for subsequent runs, remove every occurrence of "-64" in pulpino/sw/apps/CMakeSim.txt (I suggest making a backup copy of the file before doing this).
  • ld error: in pulpino/vsim/tcl_files/config/vsim.tcl, add "-dpicpppath /usr/bin/gcc" after $VSIM_FLAGS (line 16)
  • If running "make helloworld.vsim" you may need to click Simulate -> Run -> Run-all to complete the simulation and print Hello World on the ModelSim console. Alternatively, you may run "make helloworld.vsimc" to print the output on the terminal.

Adding a new application: Instructions can be found in the Readme of the pulpino/sw directory. In summary:

  • Add a new directory in sw/apps with C/C++ code of new application, including the CMakeFile (see other applications for examples)
  • Update sw/apps/CMakeLists.txt to add_subdirectory (e.g., after "add_subdirectory(helloworld)")
  • In the build directory, run ./cmake_configure.riscv.gcc.sh to cross-compile the application for RISCV. Thereafter, run "make applicationName.vsimc" or "make applicationName.vsim". Note that the RTL simulations may take a long time.
  • RTL files (SystemVerilog .sv) are in the pulpino/rtl directory. If you change the RTL, you would need to run "make vcompile" to recompile the RTL before running the new application.

Additional notes for getting started coming soon...