Laboratory Sections

Section 1: M 2:00PM-4:50PM, ECE 301
Section 3: T 2:00PM-4:50PM, ECE 301
Section 4: W 2:00PM-4:50PM, ECE 301
Section 5: T 11:00AM-1:50PM, ECE 301
Section 6: R 11:00AM-1:50PM, ECE 301


Teaching Assistant

Varadaraj Kamath, varad@email.arizona.edu
Office Hours: To Be Announced, In Lab, or by appointment


Laboratory Assignments

Students must work in groups of two for laboratory assignments. However, students have the option of working on their own if computing resources permit. You must choose your lab partner(s) during the first scheduled lab period and inform your TA of your selection. Your lab partner will remain the same for the duration of the semester. Please choose your lab partner wisely.

A laboratory lecture will be provided on the first scheduled day for each lab assignment to present the lab assignment and detail what is required for that assignment. Each lab assignment (except for Lab 1) will have a pre-lab due at the beginning of the first scheduled day and a code-check due on the assigned day. The point values for each pre-lab assignment and code-check will be specified within each lab assignment.

All Verilog files for each lab assignment must be submitted via D2L to designated dropbox. The Verilog code must be submitted by 11:59PM on the Friday of the week each lab assignment is due. Only one code submission is required per group. Be sure to include the name of all students within your groups in the comments at the top of each submitted file and follow the style guidelines discussed in lecture and lab assignments. If you do not submit your code, you will lose 20% from your lab grade. If you code does not adhere the Verilog formatting and style guidelines, you will lose 5% from your lab grade.

Labs must be finished on-time within your own scheduled lab section. NO LATE labs be accepted. NO extensions will be made for any lab assignments.



Laboratory Schedule

Lab Description Start Demo Due Code/Report Due Points
Lab 1 Introduction to Simulation and Synthesis Week 2

(Aug 31-Sep 04)

Week 2

(Aug 31-Sep 04)

Sep 04, 11:59PM 30
Lab 2 Binary to 7-segment Decoder Week 4

(Sep 14-Sep 18)

Week 5

(Sep 21-Sep 25)

Sep 25, 11:59PM 85
Lab 3 FSM for 4-bit Up-then-Down Counter Week 6

(Sep 28-Oct 02)

Week 7

(Oct 05-Oct 09)

Oct 09, 11:59PM 85
Lab 4 Binary to BCD Converter and Multiplexed BCD Display Driver Week 8

(Oct 12-Oct 16)

Week 10

(Oct 26-Oct 30)

Oct 30, 11:59PM 150
Lab 5 Reaction Timer Week 11

(Nov 02-Nov 06)

Week 15

(Nov 30-Dec 04)

Dec 04, 11:59PM 150
EC Extra Credit - Crank It Up! Anytime Dec 09, by appointment with instructor only Code due by email one day before appointment 30

ECE 274

Labs

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