Homework Assignments

A total of 10 homework assignments will be assigned, but you will only need to complete 9 of those homework assignments to receive full credit. All homework assignments will be graded out of 12 points. Each homework assignment will consist of five problems, of which only one problem will be graded in detail. The graded problem will be worth 4 points. For the remaining assigned problems, 2 points will be awarded for any reasonable solution to the problems. In addition, each homework assignment will have one extra credit question worth 1 point. Extra credit questions will be graded on an all or nothing basis, i.e., your solution must be entirely correct to receive the extra credit.

Solutions to homework assignments will be posted online within a password protected area within two days of the day each homework assignment is due (or shortly thereafter). As such, NO LATE homework assignments will be accepted, but you are welcome to submit them early.

Note: Homework assignments are indicative of the types of problems you can expect to encounter on exams.

Homework 1 – Due M Aug 31 (beginning of lecture by 12:05)

Digital Design: 1.8, 1.13, 1.17, 1.23, 1.24 (but convert the decimal number 129), Extra Credit (1 point) 1.26

Homework 2 – Due W Sep 02 (beginning of lecture by 12:05)

Digital Design: 2.11, 2.22, 2.26, 2.28, 2.45, Extra Credit (1 point) 2.37

Homework 3 – Due F Sep 04 (beginning of lecture by 12:05)

Digital Design: 2.47, 2.53, 2.58, 2.72, 2.80
Extra Credit (1 point): Design a simple comparator circuit with two 2-bit inputs A and B and a single output LT that indicates if the decimal value of A is less than the decimal value of B. For example, if A is 10 (2 in decimal) and B is 01 (1 in decimal), A is not less than B, and thus LT will be 0. Using the combinational logic design process, implement the simple comparator circuit using AND, OR, and NOT gates. Note: Be sure to label the individual bits of A and B separately.

Homework 4 – Due M Sep 21 (beginning of lecture by 12:05)

Digital Design: 3.9, 3.11, 3.13, 3.15, 3.25, Extra Credit (1 point) 3.17

Homework 5 – Due M Sep 28 (beginning of lecture by 12:05)

Digital Design: 3.29, 3.39, 3.42, 3.44, 3.46
Extra Credit (1 point): Create an FSM for a sequence generator that has two inputs, gen and term, and a single output seq. The sequence generator operates as follows. Initially, the seq output should be 1. When the gen input becomes 1, the sequence generator will output the sequence 1, 0, 1, 1, 1 on the output seq repeatedly until the term input becomes 1. When the input term becomes 1, the sequence generator should immediately terminate outputting the sequence and return to the initial state (even in the sequence generator is in the middle of the sequence).

Homework 6 – Due M Oct 12 (beginning of lecture by 12:05)

Digital Design: 4.3 (but using separate control inputs for each operation), 4.7, 4.11, 4.19, 4.22, Extra Credit (1 point) 4.15

Homework 7 – Due M Oct 19 (beginning of lecture by 12:05)

Digital Design: 4.28, 4.36, 4.43, 4.48, 4.59
Extra Credit (1 point): Design a median circuit that has three 8-bit inputs A, B, and C and one 8-bit output MED that outputs the median (or middle) value of the three inputs. The following provides a black box view of the median circuit. In your design, you may use any datapath components discussed in lectures, homework assignments, and tests. Note: Spend some time thinking about this problem first before designing your circuit. It may be easier than you initially think.

Homework 8 – Due M Nov 09 (beginning of lecture by 12:05)

Digital Design: 5.4, 5.11, 5.16, 5.19, 5.23, Extra Credit (1 point) 5.31

Homework 9 – Due M Nov 30 (beginning of lecture by 12:05)

Digital Design: 6.4, 6.11, 6.13 (show your work), 6.25, 6.27, Extra Credit (1 point) 6.21

Homework 10 – Due W Dec 09 (beginning of lecture by 12:05)

Digital Design: 7.4, 7.7, 7.20, 7.26, 7.29, Extra Credit (1 point) 7.13

ECE 274

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