/*
 * Design: ECE 274 - Skeleton Module for Clock Divider generating 
                     1 kHz clock output from 50 MHz input clock
 * Author: Roman Lysecky 
 * Copyright 2008, All Rights Reserved
 *
 * Date: August 19, 2008
 *
 */

`timescale 1ns / 1ns
module ClkDiv(Clk, Rst, ClkOut);

   input Clk, Rst;
   output reg ClkOut;
  
endmodule