2. FPGA CAD Tools, Wirelength Prediction Based FPGA CAD Flow

FPGA CAD tools require net length predictions to make informed decisions through clustering, placement and routing stages towards power, area or delay based design goals. Channel width - a routability indicator, can be expressed as a function of total length of external nets. Performance indicators such as critical path delay and power consumption can also be expressed in terms of individual net lengths. Unfortunately, there has been minimal work devoted to estimating individual net lengths early in the CAD flow. Typically, Rent's rule is used to generate a net length distribution or average for a design, but it cannot associate lengths with specific nets. We argue that net length is an important parameter not explored in this context. Several "structural metrics" have been found to possess strong predictive qualities in the ASIC domain. In this project we take a structural approach to predicting individual net lengths and explore the applications and benefits of individual net length prediction in the FPGA CAD flow, such as routability/performance enhancement and design space exploration. To our knowledge this is a first study in the application of these metrics in the FPGA CAD flow.

Publications:

• Arpit Soni, Yoon Kah Leow, Ali Akoglu, “Post-Routing Analytical Wirelength Model for Homogeneous FPGA Architectures,” IEEE International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, December 3-5, 2018, pp.1-8.
• Yoon Kah Leow, Ali Akoglu, and Susan Lysecky, "FPGA Static Power Model for Low-Duty Cycle Embedded Applications," ACM Transactions on Reconfigurable Technology and Systems (TRETS), Accepted for publication 2013.
• Hanyu Liu, Senthilkumar T. Rajavel, and Ali Akoglu, "Integration of Net Length Factor with Timing and Routability Driven Clustering Algorithms," ACM Transactions on Reconfigurable Technology and Systems (TRETS), Accepted for publication 2013. (22 pages).=
• Yoon Kah Leow, Ali Akoglu, "A Hybrid FPGA Model to Estimate On-Chip Crossbar Logic Utilizations In SoC Platforms," 20th Reconfigurable Architectures Workshop (RAW 2013), Boston, USA in May 2013.
• Rodrigo Savage, Senthilkumar T. Rajavel and Ali Akoglu, "WL-Emap: Wirelength prediction based technology mapping for FPGAs," IEEE Southern Conference on Programmable Logic, SPL 2012, Bento Gonçalves, Brazil, Mar. 20-23, 2012, pp. 1-6.
• Lakshmi Easwaran and Ali Akoglu, "Net length based routability driven power aware clustering," ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 4, no. 4, article 38, 2011. http://doi.acm.org/10.1145/2068716.2068724 (16 pages).
• Rodrigo Savage, Senthilkumar T. Rajavel and Ali Akoglu, "WL-Emap: Wirelength prediction based technology mapping for FPGAs," IEEE Southern Conference on Programmable Logic, SPL 2012, Bento Gonçalves, Brazil, Mar. 20-23, 2012
• Senthilkumar T. Rajavel and Ali Akoglu, "An analytical energy model to accelerate FPGA logic architecture investigation," IEEE Int. Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, Dec. 12-14, 2011, pp. 1-8 (source code and data files)
• Senthilkumar T. Rajavel, Ali Akoglu, "MO-Pack: Many-Objective Clustering for FPGA CAD", Design Automation Conference, June 5-10, 2011, San Diego, California
• Lakshmi Easwaran, Ali Akoglu, "Net Length Based Routability Driven Power Aware Clustering", ACM Transactions on Reconfigurable Technology and Systems, Accepted, 2010 (16 pages )
• Hanyu Liu and Ali Akoglu, "Timing-Driven Non-uniform Depopulation-Based Clustering," International Journal of Reconfigurable Computing, vol. 2010, 11 pages, 2010.
• Hanyu Liu, Ali Akoglu, "T-NDPack: Timing-Driven Non-Uniform Depopulation Based Clustering", IEEE Southern Conference on Programmable Logic (SPL'09) Sao Paulo Brazil, Apr 1-3, 2009
• Audip Pandit, Lakshmi Easwaran, Ali Akoglu, "Concurrent Timing Based and Routability Driven Depopulation Technique for FPGA Packing", IEEE International Conference on Field Programmable Technology (ICFPT'08), Taipei, Taiwan, December 8-10, 2008
• Audip Pandit and Ali Akoglu, "Wirelength Prediction for FPGAs", 17th International Conference on Field Programmable Logic and Applications" (FPL'07), pp. 749-752. Amsterdam, Netherlands August 27-29, 2007
• Audip Pandit and Ali Akoglu, "Net length based routability driven packing", IEEE International Conference on Field-Programmable Technology 2007 (ICFPT'07), pp. 225-232, Kitakyushu, Japan, December 12-14, 2007.
• Hanyu Liu, Senthilkumar Thoravi Rajavel, Ali Akoglu, "Timing-aware Clustering with Wirelength Prediction Mechanism for FPGA CAD Flow", in preparation

Source Codes:

• Energy modeling source code and date files
• Intrinsic Shortest Path Length based wirelenght prediction readme.txt and source code