.: Welcome to Dr. Akoglu's Reconfigurable
Our research program focuses on high performance computing systems and non-traditional computing architectures with themes that cover: a) development of resource management strategies from multi-processor system-on-chip to cloud computing scale; b) design and development of reconfigurable hardware architectures for reusable systems; c) modeling and simulation of neuromorphic computing architectures; and d) restructuring computationally challenging algorithms for achieving high performance on field programmable gate array (FPGA) and graphics processing unit (GPU) hardware architectures. Our lab is currently funded by:
AIR FORCE - "Autonomic Security Operations Center (ASoC)"
DARPA - "Domain-Focused Advanced Software-Reconfigurable Heterogeneous System on Chip (DASH-SoC)"
NSF I/UCRC - "Industry/University Cooperative Research Center for Cloud and Autonomic Computing"
Raytheon - “RANC: Reconfigurable Architecture for Neuromorphic Computing”
NIH, National Institute on Aging - "Impact of CMV Upon T-Cell Aging and Immune Defense"
(October 2020) Our paper titled “RANC: Reconfigurable Architecture for Neuromorphic Computing", has been accepted for publication in the Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Our recent paper titled “DS3: A System-Level Domain-Specific System-on-Chip Simulation Framework”, has been selected as the Featured Paper in the August 2020 issue of IEEE Transactions on Computers due to the paper’s novelty and practicality.
“Growing Artificial Neural Networks” will appear in Springer Transactions on Computational Science and Computational Intelligence on the issue "Advances in Artificial Intelligence and Applied Cognitive Computing"
(March 2020) "FPGA Based Emulation Environment for Neuromorphic Architectures,” as part of the "RANC" project in collaboration with Air Force Research Labs accepted for the IEEE International Parallel and Distributed Processing Symposium (IPDPS’20), Reconfigurable Architectures Workshop (RAW).
(March 2020) "User-Space Emulation Framework for Domain-Specific SoC Design,” accepted for the IEEE International Parallel and Distributed Processing Symposium (IPDPS’20), Heterogeneity in Computing Workshop (HCW).
(January 2020) "A Value-Oriented Job Scheduling Approach for Power-Constrained and Oversubscribed HPC Systems” accepted for the upcoming issue of the IEEE Transactions on Parallel and Distributed Systems.
(December 2019) Received best paper award on our work titled "Adaptive Power Reallocation for Value-Oriented Schedulers in Power-Constrained HPC" at the 20th International Conference on Parallel and Distributed Computing, Applications and Technologies PDCAT 2019
(December 2019) Presented our work on "Bit-wise and Multi-GPU Implementations of the DNA Recombination AlgorithmNirmal" at the 26th IEEE International Conference on High Performance Ccomputing, Data, and Analytics HiPC 2019
(September 2019) Josh and Nirmal participated in the ARM Research Summit with their work on "Emulation Framework for Hardware-Software Co-Design of Heterogeneous SoCs"